Title: H.264 HD IP Camera Solution on a Low Cost Cyclone3 FPGA
This is demo of HD IP camera solution on Cyclone 3 FPGA development kits. The system setup consists of the following:
1.A CMOS sensor (Aptina)
2.A Cyclone 3 Development kit with Apicals image pipeline IP core
3.A Cyclone 3 Development kit with Jointwaves HD H.264 encoder
4.Two Bitec DVI daughter cards for connecting the Cyclone 3 boards
5.A laptop for playing back the H.264 video stream using mplayer
This demo shows live HD video, the camera is pointing to the window of a conference room. With the wide dynamic range image processing and high efficient H.264 compression, the both indoor and outdoor objects are showed in details of at 4Mbps.
This was the first time that Jointwave and Apical meet together, and it took only a few minutes to set up the demo - connect a DVI cable and a Ethernet cable, and turn on the power. Actually, most of the setup time was waiting the Windows PC to boot up).
The encoded H.264 stream can be captured to a file, and be played back right away. Its compatible with standard players. The open source mplayer was used in this demo.
A discussion between Jointwave and Apical was held after the demo. It was interesting to find out the even Jointwave and Apical developed their IP cores independently, they use the same platform and the interfaces match each other, and there are almost not resource conflicts. So, it will be quite straight forward to put the two IP cores in one Cyclone 3 FPGA (such as 3C80), and then you will have a single chip solution for HD IP camera (1080p@30fps or 720p@60fps). Stay tuned for the next demo...
For more information about the availability of this and other H.264 solutions, please contact info(at)jointwave-tech(dot)com or visit our website: www.jointwave-tech.com.